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1L169 - JDSU HST-3000 SIM E1 Circuit Testing Module

JDSU HST-3000 SIM E1 Module

Intended to be used to commission and maintain E1 circuits

For Use With HST-3000 & HST-3000C Mainframes
(HST-3000 & HST-3000C Mainframe Not Included In Sale!)

HST 3000 3000C

JDSU HST-3000 E1 Circuit Service Interface Module E1-Circuit Service Interface Module Models On Sale Warranty Calibration Backed by The Best Service and Lowest Prices in the Industry.

BC# 24692-L/T*

Price: $695.00 / Each

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Condition Refurbished
Warranty 90 Day Exchange
  • JDSU HST-3000 SIM E1 Module (BC# 24692-L/T*)
  • JDSU P/N: 80-42047-01 Cable
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JDSU HST-3000 E1 SIM Module

Dual E1RX/TX

Two separate receivers (RX) and transmitters (TX) allow for the simultaneous monitoring and evaluation of a wide range of alarms and errors. Different test modes with clock preferences support all of the requirements for ITU-T G.703 frame analysis, BERT, ITU-T G.821, ITU-T G.826, and ITU-T M.2100. This enables operators to validate connectivity and QoS quickly and efficiently.

E1 Pulse Shape Option
Incorrect pulse shape, due to jitter or incorrectly terminated interfaces, causes poor network performance. The Pulse Shape software option quickly assists in identifying network problems during installation, commissioning, or troubleshooting by comparing the pulsewith the ITU-T G.703 pulse mask.The software averages the received E1 pulse and automatically displays the result against the ITU-T mask.

FrameRelay Option
With the Frame Relay software option, technicians can verify that frame relay service is functioning properly by testing LMI activity, PVC/DLCI status, congestion, and lost framesto validate committed information rates(CIR).

Bidirectional Monitoring
The HST-3000 can monitor transmission passively in both directions to confirm physical layer and service level results on E1 Circuits.

Transmitters To G.703
Outputs 2x balanced RJ-48 jacks
Impedance 120ohms
Unbalanced / 75ohms via adapter cables
Bit Rate 2048 kbit/s , +/- 3 ppm, +1 ppm per year aging
Line Code HDB3 or AMI
Frequency Offset +/- 100ppm in 1ppm intervals
Slip Reference Opposite RX, External E1 Reference Clock
Clock Source Internal, Recovered from RX1 or RX2, External E1 Reference Clock (via optional cable)
Receivers To G.703
Inputs 2x balanced RJ-48 jacks
Impedance 120ohms or bridged (hi-Z)
Unbalanced / 75ohms via adapter cables
PMP Compensation 20 to 31dB gain
Bit Rate 2048 kbit/s
Level Measurement +3 to -37dB nom
Slip Reference Opposite RX, External E1 Reference Clock
External E1 Reference Clock 0.5 to 3V square or sine wave, 2,048MHz, unbalanced / 75ohms (at adapter cable input)
E1 Circuit Testing
Framed and unframed test signal generation
Bulk, n x64kbit/s BERT
G.821, G.826, M.2100 analysis
Error and alarm and generation and analysis
Round Trip Delay
Signal Level and Frequency
Audio Monitor
Si, Sa, A-bit, and E-Bit (REBE) monitoring and generation
Test Modes Terminate, Monitor, Drop and Insert, Line Loopback
Performance Measurement G.821, G.826, M.2100
Test Patterns 2^6-1 (ITU), 2^9-1 (ITU), 2^11-1 (ITU), 2^15-1
(ITU & ITU INV), 2^20-1(ITU & ITU INV), 2^23-1 (ITU & ITU INV), QRSS, QBF
Mark (All Ones), Space (All Zeros), 1:1, 1:3, 1:4, 1:7
User Bit Patterns 3 to 32 bits
User Byte Patterns 1 to 64 bytes
Auto (via Auto Configure)
Anomaly (Error) Injection
Bit (TSE) Single, rate, multiple
Code, CRC, Pattern Slip, E-Bit (REBE) Simple
FAS Single, 2, 3, 4
MFAS Single, 2
Defect (Alarm) Generation LOS, LOF, AIS, RDI/FAS distant, MF AIS (TS-16), MF RDI/MFAS distant
Anomaly (Errors) Counts Bit(TSE), Code, FAS, MFAS, CRC, E-Bit
Frame Data Sa4, Sa5, Sa6, Sa7, Sa8, NFAS A-Bit, NMFA
Signal Results Signal loss (seconds), bit slips, RX level, TX and RX bit rate
BERT Results Bit errors (TSE), bit errorrate, errored seconds, error-free seconds, percentage error-free seconds, pattern slip, roundtrip delay, pattern loss seconds (LFF)
Audio Monitor From RX1, RX2, or RX1 and RX2
Round Trip Delay
Range 0-10 s
Resolution 100 µs
Result Categories Summary, LED, Signal, Frame Data, Timeslot, BERT, Performance (G.821, G.826ISM, G.826 OOS, M.2100ISM, M.2100 OOS), Time, Event Table, Event Log, Event Histogram

For full JDSU HST-3000 E1 product specifications, please click here: JDSU HST-3000 E1
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