Tektronix BSA286CL Bertscope Bit Error Rate Tester w/ Options J-MAP/STR

Tektronix BSA286CL Bertscope Bit Error Rate Tester

The BERTScope Bit Error Rate Tester Series provides a new approach to signal integrity measurements of serial data systems. Perform bit error rate detection more quickly, accurately, and thoroughly by bridging eye diagram analysis with BER pattern generation. The BERTScope Bit Error Rate Tester Series enable you to easily isolate problematic bit and pattern sequences, then analyze further with advanced error analysis that deliver unprecedented statistical measurement depth.

Notice to EU customers

This product is not updated to comply with the RoHS 2 Directive 2011/65/EU and will not be shipped to the EU. Customers may be able to purchase products from inventory that were placed on the EU market prior to July 22, 2017 until supplies are depleted. Tektronix is committed to helping you with your solution needs. Please contact your local sales representative for further assistance or to determine if alternative product(s) are available. Tektronix will continue service to the end of worldwide support life.

Key performance specifications

• Pattern Generation and Error Analysis, High-speed BER Measurements up to 28.6 Gb/s
• Fast Input Rise Time / High Input Bandwidth Error Detector for Accurate Signal Integrity Analysis
• Physical Layer Test Suite with Mask Testing, Jitter Peak, BER Contour, and Q-factor Analysis for Comprehensive Testing with Standard or User-defined Libraries of Jitter Tolerance Templates
• Integrated Eye Diagram Analysis with BER Correlation
• Optional Jitter Map Comprehensive Jitter Decomposition - with Long Pattern (i.e. PRBS-31) Jitter
• Patented Error Location Analysis™ enables Rapid Understanding of your BER Performance Limitations and Assess Deterministic versus Random Errors, Perform Detailed Pattern-dependent Error Analysis, Perform Error Burst Analysis, or Error-free Interval Analysis

Key features

• Integrated, calibrated stress generation to address the stressed receiver sensitivity and clock recovery jitter tolerance test requirements for a wide range of standards
  • Sinusoidal jitter to 100 MHz
  • Random jitter
  • Bounded, uncorrelated jitter
  • Sinusoidal interference
  • Spread spectrum clocking
  • PCIe 2.0 & 3.0 receiver testing
  • F/2 jitter generation for 8xFC and 10GBASE-KR testing
  • IEEE802.3ba & 32G fibre channel testing
• Electrical stressed eye testing for
  • PCI express
  • 10/40/100 Gb Ethernet
  • SFP+/SFI
  • OIF/CEI
  • Fibre channel (FC8, FC16, FC32)
  • SATA
  • USB 3.1 
  • InfiniBand (SDR, QDR, FDR, EDR)
• Tolerance compliance template testing with margin testing
• Integrated eye diagram analysis with BER correlation

Applications

• Design verification including signal integrity, jitter, and timing analysis
• Design characterization for high-speed, sophisticated designs
• Certification testing of serial data streams and high performance Networking systems
• Design/Verification of high-speed I/O components and systems
• Signal integrity analysis – mask testing, jitter peak, BER contour, jitter map, and q-factor analysis
• Design/Verification of optical transceivers

Linking domains

Eye diagrams have always provided an easy and intuitive view of digital performance. It has been harder to tie this directly with BER performance, as the instruments that provide views of each have been architected in fundamentally different ways. Eye diagrams have been composed of shallow amounts of data that have not easily uncovered rarer events. BERTs have counted every bit and so have provided measurements based on vastly deeper data sets, but have lacked the intuitive presentation of information to aid troubleshooting.

The BERTScope removes this gap allowing you to quickly and easily view an eye diagram based on at least two orders of magnitude more data than conventional eyes. Seeing a feature that looks out of the ordinary, you are able to place cursors on the item of interest and by simply moving the sampling point of the BERT, use the powerful error analysis capabilities to gain more insight into the feature of interest. For example, check for pattern sensitivity of the latest rising edges. Alternatively, use one-button measurement of BER Contour to see whether performance issues are bounded or likely to cause critical failures in the field. In each case, information is readily available to enhance modeling or aid troubleshooting, and is available for patterns up to 2³¹- 1 PRBS.

Data rich eye diagrams

As shown previously, there is an impressive difference in data depth between conventional eye diagrams and those taken with a BERTScope. So what does that mean? It means that you see more of what is really going on - more of the world of low-probability events that is present every time you run a long pattern through a dispersive system of any kind, have random noise or random jitter from a VCO - a world that is waiting to catch you out when your design is deployed. Adding to this the deeper knowledge that comes from the one-button measurements of BER Contour, Jitter Peak, and Q-factor, and you can be confident that you are seeing the complete picture.

Deep mask testing

With the ability to vary sample depth, it is very easy to move between deep measurements which give a more accurate view of the real system performance, and shallow measurements that match those of a sampling oscilloscope. The measurements shown below are from the eye diagram of an optical transmitter. With the BERTScope sample depth set to only 3000 waveforms, the BERTScope generates the diagram shown in the middle in only 1 second. The measured mask margin of 20% exactly correlates to the same measurement made on a sampling oscilloscope. The lower diagram shows the eye produced by the same device, using Compliance Contour measured at a BER of 1×10^-6. Here the mask margin is reduced to 17%.

The depth advantage gained for eye diagrams is at least 10 times greater for mask testing. Unlike pseudo-mask testing offered by some BERTs, a BERTScope mask test samples every point on the perimeter of an industry-standard mask, including the regions above and below the eye. Not only that, but each point is tested to a depth unseen before. This means that even for a test lasting a few seconds using a mask from the library of standard masks or from a mask you have created yourself, you can be sure that your device has no lurking problems.

Accurate jitter testing to industry standards

Testing with long or short patterns, the most accurate jitter measurement is likely to come from the methodology that uses little or no extrapolation to get its result. With the BERTScope, you can quickly measure to levels of 1×10^-9(1×10^-10at high data rates), or wait for the instrument to measure 1×10^-12directly. Either way, the BERTScope's one-button measurements are compliant to the MJSQ jitter methodology, and because the underlying delay control is the best available on any BERT you can be sure that the measurements are accurate. Use the built-in calculations for Total Jitter (TJ), Random Jitter (RJ), and Deterministic Jitter (DJ), or easily export the data and use your own favorite jitter model.

The BSA286CL's low intrinsic RJ supports serving of 802.3ba's simultaneous VECP (Vertical Eye Closure Penalty) and J2/J9 calibration with valuable margin required to fully characterize 100G Ethernet silicon.

Mask compliance contour testing

Many standards such as XFP/XFI and OIF CEI now specify mask tests intended to assure a specified 1×10^-12eye opening. Compliance Contour view makes this easy by taking a mask, and overlaying it on your measured BER contours - so you can immediately see whether you have passed the mask at whatever BER level you decide.

Flexible clocking

The generator clock path features in the BERTScope provides the test flexibility needed for emerging real-world devices. Whether computer cards or disk drives, it is often necessary to be able to provide a sub-rate system clock, such as 100 MHz for PCI Express^®(PCIe). To get the target card running may require a differential clock signal with a particular amplitude and offset; this is easily accomplished with the BERTScope architecture, with many flexible divide ratios available.

Clock path in BERTScope Option STR models

Spread Spectrum Clocking (SSC) is commonly used in electrical serial data systems to reduce EMI energy by dispersing the power spectrum. Adjustable modulation amplitude, frequency, and a choice of triangle or sine modulation wave shape allow testing receivers to any compliance standard which utilize SSC. An additional modulator and source allows users to stress the clock with high-amplitude, low-frequency Sinusoidal Jitter (SJ).

Working with closed eyes

With the need to push ever-increasing data rates through electrical channels, the frequency-dependent losses often result in eye closure at the receiver end. Engineers use equalization to compensate for these losses and "open the eyes" in the real system. Tektronix offers powerful tools that allow designers to characterize and test compliance of receiver and transmitter components used in these systems.

In keeping with the BERTScope philosophy, the graphical user interface presents the control functionality in a logical, easy-to-follow format. A time domain representation of the response shows the effects of tap weight settings. The frequency domain Bode plot shows how the filter will compensate for the channel losses.

For receiver testing, the DPP125C Digital Pre-emphasis Processor adds calibrated pre-emphasis to the BERTScope pattern generator outputs, emulating pre-emphasis applied at the transmitter. Pre-emphasis is currently used in 10GBASE-KR, PCIe, SAS 12 Gb/s, DisplayPort^®, USB 3.1, and other standards.

Features:

• 1-12.5 Gb/s clock rates
• 3- or 4-tap versions
• Flexible cursor placement allowing pre-cursor or post-cursor
• Option ECM (Eye opener, Clock Multiplier, Clock Doubler)

PatternVu

The PatternVu option includes a software-implemented FIR filter which can be inserted before the eye pattern display. In systems employing receiver equalization, this allows you to view the eye diagram and perform physical measurements on the eye as the receiver's detector would see it, after the effect of the equalizer. Equalizers with up to 32 taps can be implemented, and the user can select the tap resolution per UI.

PatternVu also includes CleanEye, a pattern-locked averaging system which removes the nondeterministic jitter components from the eye. This allows you to clearly see pattern-dependent effects such as ISI (Inter-Symbol Interference) which are normally obscured by the presence of high amounts of random jitter.

Single Value Waveform export is a component in the PatternVu option. This allows you to capture a pattern-locked waveform showing single bits, similar to a single-shot capture in a real-time oscilloscope. Once captured, the waveform can be exported in a variety of formats for further analysis in an external program.

Add clock recovery

The Tektronix CR125A, CR175A, and CR286A add levels of flexibility in compliant clock recovery. Most standards requiring jitter measurement specify the use of clock recovery, and exactly which loop bandwidth must be used. Using a different or unknown loop bandwidth will almost certainly give you the wrong jitter measurement. The new clock recovery instrument enables easy and accurate measurements to be made to all of the common standards.

The intuitive user interface provides easy control of all operating parameters. A unique Loop Response view shows the loop characteristics – actually measured, not just the settings value.

The usefulness of the BERTScope CR is not just confined to BERTScope measurements. Use them stand-alone in the lab with your sampling oscilloscopes, or with existing BERT equipment. Compliant measurements are available to you by pairing either of these versatile instruments with your existing investments.

Display and measure SSC modulation

Spread Spectrum Clocking (SSC) is used by many of the latest serial busses including SATA, PCI Express, and next-generation SAS to reduce EMI issues in new board and system designs. The Tektronix CR Family provides spread spectrum clock recovery together with the display and measurement of the SSC modulation waveform. Automated measurements include minimum and maximum frequency deviation (in ppm or ps), modulation rate of change (dF/dT), and modulation frequency. Also included are display of the nominal data frequency and easy-to-use vertical and horizontal cursors.

Taking stress out of receiver testing

As networks have changed, so have the challenges of testing receivers. While tests such as BER and receiver sensitivity are still important, receiver jitter tolerance has evolved to be more real-world for jitter-limited systems such as 10 Gb/s data over back planes and new high-speed buses. Stressed Eye testing is becoming increasingly common as a compliance measurement in many standards. In addition, engineers are using it to explore the limits of their receiver performance to check margins in design and manufacturing.

Creating the stress recipe for receiver testing to a complicated standard such as PCIe 2.0 used to require "racking and stacking" several instruments, then spending hours calibrating the setup. With BERTScope, an easy-to-understand graphical view gives you control of all of the calibrated stress sources you need – inside the same instrument. Eliminating the need for external cabling, mixers, couplers, modulators, etc. simplifies stress calibration.

Tektronix BSA286CL Bertscope Bit Error Rate Tester

Installed Options:
- J-MAP: Jitter Decomposition Software
- STR: Stressed Signal Generation (Includes options ECC, MAP, PL, XSSC, JTOL, SF)

Low Noise - 28.6 Gb/s Pattern Generator and Error Analyzer 

Includes Accessories As Listed Above!

BC# -L/T*

Tektronix BSA286CL BSA-286CL Bit Error Rate Tester Models On Sale Warranty Calibration Backed by The Best Service and Lowest Prices in the Industry.

• Tektronix BSA286CL Bertscope Bit Error Rate Tester w/ Options: (BC# -L/T* )
  • Installed Options:
    • J-MAP: Jitter Decomposition Software
    • STR: Stressed Signal Generation (Includes options ECC, MAP, PL, XSSC, JTOL, SF)
• Power Cord
• User Manual on CD 

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